A general purpose parallel computer may have to process concurrent memory accesses requested by possibly thousands of processors in the computer. Several or all of the processors may have to read the same memory address at the same time. In addition, several or all of the processors may have to write a value into the same memory address, in which case some convention must be adopted about the desired outcome. In either case, the read/write requests must converge from the various parts of the physical system to one location. As each request is sent to a destination component containing the relevant address, the destination component requires time to handle the request proportional to the number of requests arriving there. In general, this overhead becomes unacceptable if the number of processors, p, is large, if no special provisions are made for combining.